Interpreting the Euler-Lagrange Equations as the Gradient of the Action Functional

We study the smooth path spaces of Euclidean spaces $\mathbb{R}^N$, as diffeological spaces. We show that the tangent spaces of the free path space $\mathscr{P}$ are isomorphic to $\mathscr{P}$ itself, and that the tangent spaces of the space $\mathscr{P}_{\mathbf{p}, \mathbf{q}}$ of paths with fixed endpoints $\mathbf{p}$ and $\mathbf{q}$ are isomorphic to the smooth loop space of $\mathbb{R}^N$ based at the origin. We also define cotangents and gradients of smooth maps from these path spaces, and then show that, in the case of the action functional which arises in the calculus of variations, the gradient is precisely the path formed out of the terms of the Euler-Lagrange equations. We show that solutions of the Euler-Lagrange equations correspond precisely to the zeros of the gradient, and also provide analogous interpretations for the constrained Euler-Lagrange equations. This gives an illuminating geometric perspective on these equations. Finally, we illustrate the theory with several concrete examples from geometry, mechanics and machine learning.Comment: 19 pages, 4 figure

The Design of High-Throughput Asynchronous Pipelines

Clocked or synchronous design has traditionally been used for nearly all digital systems. However, it is now facing significant challenges as clock rates reach several GigaHertz, chip sizes increase, and the demand for low power and modular design become paramount. An alternative paradigm is clockless or asynchronous design, which has several potential advantages towards meeting these challenges. This thesis focuses on the design of very high-speed asynchronous systems. A more specific focus of this thesis is on high-throughput asynchronous pipelines, since pipelining is at the heart of most high-performance systems. This thesis contributes four new asynchronous pipeline styles: 'lookahead,' 'high-capacity,' 'MOUSETRAP' and 'dynamic GasP' pipelines. The styles differ from each other in many aspects, such as protocols, storage capacity, implementation style, and timing assumptions. The new styles are capable of multi-GigaHertz throughputs in today's silicon technology (e.g., 0.13-0.18 micron), yet each style has a simple implementation. High throughputs are obtained through efficient pipelining of systems at a fine granularity, though the pipeline styles are also useful for coarser-grain applications. The basic pipeline styles are extended to address several issues that arise in practice while designing real-world systems. In particular, the styles are generalized to handle a greater variety of architectures (e.g., datapaths with forks and joins), and to robustly interface with arbitrary-speed environments. Finally, the approaches of this thesis are validated by designing and fabricating real VLSI subsystems, including: simple FIFO's, pipelined adders, and an experimental digital FIR filter chip. All chips were tested to be fully functional; throughputs of over 2.4 GHz for the FIFO's, and up to 1.3 GHz for the FIR filter, were obtained in an IBM 0.18 micron technology

Representations of the Fundamental Groups of Triangulated 3-Manifolds

In this thesis we study representations of the fundamental groups of triangulated 3-manifolds. Previous work of Rubinstein-Tillmann has chosen how to construct a class of such representations into the symmetric groups when the triangulation is even. In another context, building on the work of Thurston and many others on geometric structures and associated holonomy representations, work of Luo has shown how to construct a class of such representations into projective linear groups when the triangulation admits a solution to the hyperbolic gluing equations over some commutative ring with identity. This thesis provides a general framework unifying these two examples. In this generality, some results are proven connecting the combinatorics of the triangulation to the topology of the manifold, the latter in the form of its fundamental group. Moreover, as a result of his aforementioned work, Luo has made a conjecture regarding the existence of projective linear representations for the fundamental group of any connected, compact 3-manifold. In this thesis, we investigate this conjecture, providing equivalent formulations. Using these formulations, we show that the (4; 1)-Dehn lling of the gure-8 knot complement, using the knot theoretic framing, is a counterexample to Luo's conjecture. However, we show that the conjecture does hold true for such classes of spaces as orientable hyperbolic 3-manifolds and S1-bundles over orientable, connected, compact surfaces

Synthesis for Logical Initializability of Synchronous Finite State Machines

A new method is introduced for the synthesis for logical initializability of synchronous state machines. The goal is to synthesize a gate-level implementation that is initializable when simulated by a 3-valued (0,1,X) simulator. The method builds on an existing approach of Cheng and Agrawal, which uses constrained state assignment to translate functional initializability into logical initializability. Here, a different state assignment method is proposed which, unlike the method of Cheng and Agrawal, is guaranteed safe and yet is not as conservative. Furthermore, it is demonstrated that certain new constraints on combinational logic synthesis are both necessary and sufficient to insure that the resulting gate-level circuit is 3-valued simulatable. Interestingly, these constraints are similar to those used for hazard-free synthesis of asynchronous combinational circuits. Using the above constraints, we present a complete synthesis for initializability method, targeted to both two-level and multi-level circuits

An Asynchronous Intensity Representation for Framed and Event Video Sources

Neuromorphic "event" cameras, designed to mimic the human vision system with asynchronous sensing, unlock a new realm of high-speed and high dynamic range applications. However, researchers often either revert to a framed representation of event data for applications, or build bespoke applications for a particular camera's event data type. To usher in the next era of video systems, accommodate new event camera designs, and explore the benefits to asynchronous video in classical applications, we argue that there is a need for an asynchronous, source-agnostic video representation. In this paper, we introduce a novel, asynchronous intensity representation for both framed and non-framed data sources. We show that our representation can increase intensity precision and greatly reduce the number of samples per pixel compared to grid-based representations. With framed sources, we demonstrate that by permitting a small amount of loss through the temporal averaging of similar pixel values, we can reduce our representational sample rate by more than half, while incurring a drop in VMAF quality score of only 4.5. We also demonstrate lower latency than the state-of-the-art method for fusing and transcoding framed and event camera data to an intensity representation, while maintaining $2000\times$ the temporal resolution. We argue that our method provides the computational efficiency and temporal granularity necessary to build real-time intensity-based applications for event cameras.Comment: 10 page

Multilateral development banking for this century’s development challenges: five recommendations to shareholders of the old and new multilateral development banks

The multilateral development banks (MDBs) emerged as one of the international community’s great success stories of the post–World War II era. Set up to address a market failure in long-term capital flows to post-conflict Europe and developing countries, they combined financial heft and technical knowledge for more than five decades to support their borrowing members’ investments in post-conflict reconstruction, growth stimulation, and poverty reduction. However, the geo-economic landscape has changed dramatically in this century, and with it the demands and needs of the developing world. Developing countries now make up half of the global economy. The capital market failure that originally motivated the MDBs is less acute. Almost all developing countries now rely primarily on domestic resources to manage public investment, and some of the poorest countries can borrow abroad on their own. Similarly, growth and the globalization of professional expertise on development practice have eroded whatever near-monopoly of advisory services the MDBs once had. At the same time, new challenges call for global collective action and financing of the sort the MDBs are well suited to provide but have been handicapped in doing so effectively. The list goes beyond major financial shocks, where the IMF’s role is clear—ranging from climate change, pandemic risk, increasing resistance to antibiotics, and poor management of international migration flows and of displaced and refugee populations. Other areas include the cross-border security and spillovers associated with growing competition for water and other renewable natural resources, and, with climate change, an increase in the frequency and human costs of weather and other shocks in low-income countries that are poorly equipped to respond. These new and urgent challenges—including a restart of the healthy rates of economic growth that are at the heart of the MDBs’ contribution to the globally agreed sustainable development goals—have in common disproportionate risks and benefits for the developing world, and a particular need to combine financing, technical and country expertise, and a coordinated international policy response. The MDBs may no longer hold a monopoly on financing, expertise, and coordination, but they remain uniquely suited to combine these assets to deal with new and diverse challenges. In short, if the MDBs no longer existed today, the international community would have to reinvent them. We recommend that the shareholders of the seven major MDBs treat these global challenges not in the incremental and piecemeal manner that has become the habit of the last several decades, but instead as a system for the whole to be more effective than the sum of its parts. The system should hold in common the key principles of transparency, accountability, and sustainability. But specific roles and mandates across the MDBs should vary to recognize their inherent differences in comparative advantage, particularly between the World Bank and the regional MDBs. Recognizing the growing global premium on environmental sustainability in a climate-challenged world, we call on member governments of the World Bank to take the first step in that direction by renaming the International Bank for Reconstruction and Development (IBRD) as the International Bank for Reconstruction and Sustainable Development (IBRSD)—and to reshape its mission accordingly, toward leadership on issues of the global commons or global public goods that are squarely in the development domain and require a global shareholder base to respond collectively. Shareholders should in turn look to the regional MDBs to take leadership in supporting the new imperative of sustainable development through country and regional operations across all sectors, but particularly in increasing investment in infrastructure that takes into account the logic of low-carbon and climateresilient economies in the developing world. In line with this approach to differentiated roles within an MDB system, the panel makes five recommendations to better realize the MDB system’s potential for meeting today’s development challenges

Generalized Latency-Insensitive Systems for Single-Clock and Multi-Clock Architectures

Latency-insensitive systems were recently proposed by Carloni et al. as a correct-by-construction methodology for single-clock system-on-a-chip (SoC) design using predesigned IP blocks. Their approach overcomes the problem of long latencies of global interconnects in deep-submicron technologies, while still maintaining much of the inherent simplicity of synchronous design. In particular, wires whose latency is greater than a clock cycle are segmented using “relay stations, ” and IP blocks are made robust to arbitrary communication delays. This paper shows, however, that significant extensions are needed to make latency-insensitive systems useful for the practical design of large-scale SoC’s. In particular, this paper proposes three extensions. The first extension allows each synchronous module to treat its input and output channels in a much more flexible manner, i.e., with greater decoupling. The second extension generalizes inter-module communication from point-to-point channels to more complex networks of arbitrary topologies. Finally, the third extension is to target multi-clock SoC’s. The net impact of our extensions is the potential for improved throughput, reduced power consumption, and greater flexibility in design. 1